Converters delivering in analogue form two voltages respectively proportional to the sine and cosine of an input angle given in digital form

ABSTRACT

A DIGITAL-TO-ANALOGUE CONVERTER CIRCUIT OF THE TYPE SUPPLYING, FROM AN ANGLE 01 COMPRISED BETWEEN 0 AND 90* AND GIVEN IN DITIGAL FORM, TWO OUTPUT VOLTAGES US1 AND US2 SUCH THAT   US1 =TAN 01 US2   THE CIRCUIT COMPRISES TO THIS END TWO OPERATIONAL AMPLIFIERS, RESPECTIVELY FEEDING TWO LINEAR DECODERS, WITH TWO FEEDBACK LOOPS BETWEEN THE OUTPUTS OF THE DECODERS AND THE INPUTS OF THE AMPLIFIERS.

Filed June 15, 1967 23, 1971 G|RAULT ETAL a CONVERTERS DELIVERING IN ANALOGUE FROM TWO VOLTAGES RESPECTIVELY PROPORTIONAL TO THE SINE AND COSINE OF AN INPUT ANGLE 2 Sheets-Sheet 1 J. GIRIAULT ET AL 3,566,393

Feb. 23, 1971 CONVERTERS DELIVERING IN ANALOGUE FROM TWO VOLTAGES RESPECTIVELY PROPORTIONAL TO THE SINE AND COSINB OF AN INPUT ANGLE GIVEN IN DIGITAL FORM 2 Sheets-Sheet 2 Filed June 15, 1967 METM/O/PK OI T I 251 23; B B bib "3 w Fug 5 Fig.4-

United States Patent Int. Cl. H03k 13/04 US. Cl. 340-347 4 Claims ABSTRACT OF THE DISCLOSURE A digital-to-analogue converter circuit of the type supplying, from an angle 6 comprised between 0 and 90 and given in digital form, two output voltages Us and Us such that tan 01 The circuit comprises to this end two operational amplifiers, respectively feeding two linear decoders, with two feedback loops between the outputs of the decoders and the inputs of the amplifiers.

The present invention relates to digital-to-analogue converter circuits of the type supplying, from two input voltages Ue and Ue and from an angle 6 comprised between 0 and 90, and given in digital form, two output voltages Us and Us;,, such that where 0 is the angle complementary to 0 and 18 a parameter.

It is known that if B is suitably chosen (equal to 6.165/ if 0 and 0 are expressed in degrees), the ratio where e is a term which varies according to the value of 0 but whose absolute value remains lower than 1.8 aremin. The precision may be enhanced if {3 is made to vary Disregarding this term 6, Us and Us may be written as US =Ue K(0 Sin 01 US2 U2K(01) COS (91 where K09 is a function of 0 It is also known that a converter circuit of the aforesaid type has numerous applications in synchro systems.

In such systems the variation of K(0 (i6.5%) appears as a variation of the stiffness of the coupling, with no effect on precision.

A circuit of this type has been proposed, which uses two networks comprising weighted resistances connected in parallel by means of switches operated by the various digits which represent the digital value of angle 0 These two networks respectively fed by voltages U6 and Ue respectively deliver voltages Us; and Us whose ratio is of the above indicated form.

But a converter of this kind possesses the defect that the switched terminals of the network resistances are either grounded or left free. When left free, they are in fact grounded through unavoidable stray capacities. This limits the networks maximum operating frequency, for a given degree of precision.

The purpose of the present invention is to overcome this serious drawback.

According to the present invention, there is provided a digital-to-analogue converter circuit of the type comprising a first and a second voltage input for respectively receiving two input voltages U2 and U2 means for applying to said circuit a digital input signal, which is a function of an angle 0 comprised between 0 and and two voltage outputs for respectively supplying two output voltages Us and Us such that tadma U8 Ue 0 1+B0 where 0 is the angle complementary to angle 6 and 13 a parameter, said converter circuit comprising: a first and a second linear decoder having respective voltage inputs, respective voltage outputs respectively building up said converter circuit first and second outputs, and respective digital inputs for respectively imparting to said decoders gains 0 and k6 where k is a constant; a first and a second operational amplifier having respective outputs respectively coupled to said voltage inputs of said first and second decoders, and respective inputs; the input of said first amplifier being coupled through respective resistors to said first input of said circuit, to said first amplifier output, and to the output of one of said decoders, and the input of said second amplifier being coupled through respective resistors to said second input of said circuit, to said second amplifier output, and to the output of the other one of said decoders.

The invention will be best understood and other characteristics thereof will become apparent from the following description and the appended drawing, in which:

FIG. 1 is a diagram of part of a circuit according to the invention;

FIGS. 2a, 2b, and 2c show various embodiments of linear decoders which may be used in the circuit according to the invention;

FIG. 3 shows one embodiment of a synchro-transmitter including a circuit according to the invention; and

FIG. 4 is the diagram of a digitally controlled system for controlling the position of a shaft, using a crossedcoupling modification of the converter circuit according to the invention.

In the more versatile embodiment of the circuit according to the invention, the outputs of the first and second linear decoders are respectively coupled to the inputs of the first and the second operational amplifiers.

In this case, the circuit according to the invention comprises two networks, respectively coupling the first input of the circuit to its first output, and its second input to its second output, those two networks being respectively referred to as the ti -network and the %network.

FIG. 1 illustrates the first of those two networks and shows the first input of the circuit, comprising terminals 3 and 4 and the first output, comprising terminals 5 and 6, terminals 4 and 6 being grounded.

An operational amplifier 1 has its input 10 connected to terminal 3 through a resistor R and its output connected to the voltage input of a linear decoder 2, whose output is connected to terminal 5. The input 10 of amplifier 1 is connected to its output through a resistor R and to the terminal 5 through a resistor R The linear decoder 2, having a constant output resistive impedance Z comprises a digital input for receiving a coded signal P comprising bits b to b,,, representative either of an angle 0 comprised between 0 and 90, i.e.

i=n 0 =360 E 17,2-

or this same angle less 360/2P. The structure of the linear decoder is adapted to each case, so that in both cases, the gain imparted to the decoder should be k where k is a constant.

The operation is as follows: An A-C input voltage Ue is applied between terminals 3 and 4, giving rise to a voltage U; at the input of the decoder 2, which thus supplies an output voltage R2 US1-IC-01-UGJZO+RZ The amplifier 1 being an operational amplifier, its gain and the product thereof by its input impedance are very high, so that the voltage and current to ground at input 10 are substantially zero. From this results that:

Us] U1 Elm R1 13, R2 and further, taking into account relation (1):

and P of 0 those two cases having a particular interest in that d to d are then identical to bits 5 to '13,, complementary to bits b to b,,.

This second network gives thus an output voltage Us such that:

& & fie U62 R1 1 +502 where has the same expression as before, and:

FIG. 2 shows three possible types of linear decoders having a constant output impedance Z which may be used in each of the two networks of the above described circuit.

In FIG. 2a, switches I to I are respectively controlled bp the binary digits b to b or d;, to d,,.

According to whether the controlling digit b, or d has the value 0 or 1, switch I, (i varying from 3 to n) connects the weighted resistance 2. XR, either to input 7 held at a constant DC potential U and grounded for the operating frequency of the decoder, or to input 8 which receives the input voltage U taken with respect to the potential U The other end of the resistance 2 R is connected to output 9 which delivers the output voltage U Switch 1;; connects an additional resistance 2 R either to input 7, or to input 8 according to whether the digital input is representative of angle 0, (i=1 or 2) or of 0j360/2 for this additional resistance compensates for the missing part in the digital input. In FIG. 2, as well as in the following ones, mechanical switches are shown for the sake of clarity, but of course electromechanical or electronic switches are advantageously used.

FIG. 2b shows the so-called ladder decoder.

Switches I, to I and 1 are operated in the same way as before. However, all the resistors switched by means of switches 1 to I have a common value 2R, and are interconnected by means of resistors having the value R. The additional resistor switched by means of switch I has the value 2R.

FIG. 20 shows a so-called compound decoder. In the example represented the switched resistances are grouped in groups of 3 binary digits. Calculation then shows that, in order that each group shall comprise the same resistances R, 2R and 4R, the coupling resistances between groups must have the value 7R/ 2. The additional resistance switched by switch I has the value 4R.

The decoder of FIG. 2a is the simplest but possesses the drawback of needing high value resistances 2 XR which are difiicult to obtain.

So preference will be given to the decoders of FIGS. 2b and 2c, the compound decoder, in particular, giving a compromise between the number of resistances required and the maximum ohmic value to be allocated.

Of course, if P for example, is always representative of 0 switch I and the additional element switched thereby may be eliminated, while if P should always be equal to 0 -3600 the additional element, while being retained, need not be associated with a switch.

FIG. 3 shows the circuit diagram of a first example of application of the converter circuit according to the invention for the construction of an entirely static synchro-transmitter.

In general a synchro-transmitter has to deliver, on a 2-wire connection, voltages proportional to sin 0 and cos 6, where 0 is the angle to be transmitted and varies between 0 and 360.

Such an angle, given in digital form, is expressed by:

a1 a; 0 sin 6 cos 0 0 0 0 sin 6 cos 0;. 0 1 904-0 cos 6; sin 03; 1 0 180+0; -sin 0 -cos 0 1 1 270+); cos 6 sin 0 The synchro-transmitter of FIG. 3 comprises two networks 24 and 25 similar to that described in FIG. 1, each one of the decoders comprising an additional resistor switched by a switch I as shown in the description of FIG. 2.

The reference voltage U is applied between terminals 210 and 211 of the primary of a transformer 21. The secondary of transformer 21 has a midde-point connected to ground and the voltages collected between respectively terminals 212 and 213, and ground, are respectively in phase and in phase opposition with voltage U The input of network 24 is connected either to terminal 212 or to terminal 213 by the moving contact 220 of a switch 22 provided with a control input 221. Network 24 is provided with digital control inputs 240 and 241 for controlling the linear decoder of network 24.

The input of network 25 is connected either to terminal 213 or to terminal 212 by the moving contact 230 of a switch 23 provided with a control input 231. Network 25 is provided with digital control inputs 250 and 251 for controlling the network linear decoder.

It is desired to collect a sin voltage and a cos 0 voltage respectively on the outputs 242 and 252.

The various binary control digits are derived by means of a logic circuit, 26, from the binary digits a, to a applied to inputs 260 and which represent the angle 0 to be transmitted. The connections between the outputs 261, 262, 263, 264, 265 and 266 of the circuit 26 with respectively the inputs 221, 231, 240, 250, 241, and 251 have not been shown.

The action is as follows, referring to the table given above:

Each of the networks 24 and 25 has to supply voltages whose amplitudes are proportional to sin 0 or cos 6 according to the value of the binary digit a i.e. the angle 0 controlling the gain of the decoder of network 24 must be equal to 0 or to 900 according to whether a is 0 or 1. To this end switches I to I of the decoder of network 24 are respectively controlled by the binary digits b =a .a +a,.a and the switch I of this decoder by the binary digit a In the same way, the decoder of network 25 and its switch I are respectively controlled by the binary digits b, and T The appropriate sign or for the Voltages at outputs 242 and 253 given in the above table is obtained by applying at the inputs of networks 24 and 25 voltages in phase or in phase opposition with U To this end switch 22 is controlled by the binary digit a and switch 23 by the binary digit 5, c being equal to (iIIi;+a .a

The two switches 22 and 23 are shown in FIG. 3 in the positive sign position, i.e. assuming the angle 0 is contained in the first quadrant (a =0, a =O). The values of the voltages collected at outputs 242 and 252 are respectively K(0 U sin 9 and K09 U cos 0, where K(0 is a function of 0 If a three-wire synchro-detection coupling is required, all that is required is to connect outputs 242 and 252 to a SCOTT transformer.

FIG. 4 shows an embodiment of a shaft-positioning system with digital control, using a modification of the digitalto-analogue converter circuit according to the invention, wherein the outputs of the first and second linear decoders are respectively coupled to the inputs of the second first operational amplifiers.

Two voltages of equal amplitude and in phase opposition are collected at the terminals of the secondary, whose midde-point is grounded, of a transformer 40. These terminals are connected to a selector 41 controlled by the binary digits a and a applied at its control input 410'. Those binary digits a and a are the digits of greatest weight of a series of digits a to a representing an angle 0 supplied, for example, by a store register. Again 0=0 +0 where 6 is represented by the digits a to a The outputs of selector 41 are connected to windings 420- and 421 of the stator of a resolver 42. Windings 422 and 423 of the rotor of resolver 42 are respectively connected to input resistances 43 and 44 of the converter circuit according to the invention.

Resistance 43 is connected to operational amplifier 45 shown with its negative feed-back resistance 47.

The output of amplifier 45 is connected to a linear decoder 51 controlled by the binary digits 01 to a received at its input 510, so as to show a gain k0 this decoder not needing an additional element switched by switch 1 (FIG. 2), since it is always controlled by a digital input signal P representative of 0 Similarly, resistance 44 is connected to an operational amplifier 46 provided with a negative feed-back resistance 48. The output of amplifier 46 is connected to a linear decoder 52 controlled by the binary digits 21 to I, and with a gain k(900 This digital input signal P being always representative of the decoder 52 includes the additional element compensating for the missing term 360/2 but of course no switch I is required (FIG. 2).

The negative feedback circuits between the outputs 51 and 52 of the converter circuit according to the invention, which is used in the system of FIG. 4, and the inputs of this circuit, are crossed, resistance 49 being connected between the output of decoder 52 and the input of amplifier 45, and resistance 50 being connected between the output of decoder 51 and the input of amplifier 46.

The outputs of decoders 51 and 52 are connected to the terminals of the primary of a transformer 53 whose secondary delivers to an amplifier 54 a voltage proportional to the difference of the voltages Us, and Us applied to the primary.

The output voltage of amplifier 54 controls a motor 55 which sets shaft 424 of resolver 42 in an angular position 0 with respect to a fixed axis of reference. A generator 56 whose shaft is fixed to that of motor 55 provides continuous damping on the servo-loop produced.

The action is a follows:

The binary digits a and a control the quadrant in which the resolver is to be angularly positioned, modifying by a multiple of the position of the reference axis provided by the stator. And so, windings 422 and 423 supply respectively the voltages Ue =V cos 0e and Ue =V sin 0:2 the relation of 0:2 less than 90 with respect to He being the same as that of 0 with respect to 0.

When the servo-loop has operated, i.e. the error term 6 between the output voltages Us and Us of the decoders 51 and 52 is negligible, there is obtained Us Us From this results that if the value of the coupling resistors are suitably chosen, the same relations between Us and Ue' on the one hand, and Us and Ue on the other hand, may be obtained as with the first embodiment of the converter circuit according to the invention, i.e. disregarding the error term 6 in the approximation 1 2 =tan 0 2 e2 1+B 1 there is obtained:

Us; Ue cos Be sin 0 Us m tan 01 sin 06; cos 6 And, again since Us Us t sin 0 cos 0e =sin 0:2 cos 0 i.e

sin (0 =0e )=0 6 =0e and the angular position 02 of shaft 424 reproduces the angle 0 with a high degree of precision.

The cross coupled embodiment of the circuit, however, does not apply in every case.

Calculation shows that, beside the case where the circuit is part of a servo-system where the error term is Us Us it also applies, for example, where Ue is iden- @411 (1+B02) U82 U62 92 +601) where 0 is an angle comprised between 0 and 90, 0 is the angle complementary to angle 0 and B a parameter, said converter circuit comprising: a first and a second linear decoder having respective voltage inputs, respective voltage outputs which respectively are said converter circuit first and second outputs, and respective sets of digital inputs; a logic circuit, having inputs for receiving digitalsignals representative of said angle 0 and a first and a second set' of outputs respectively coupled to said sets of digital inputs of said first and second linear decoder for respectively applying to said first and second linear decoder digital signals causing them to impart gains respectively equal to km and k0 where k is a constant, to the input voltages respectively applied to their voltage inputs; a first and a second operational amplifier having respective outputs respectively coupled to said voltage inputs of said first and second decoders for supplying their respective output voltages to said voltage inputs of said first and second linear decoders respectively, and respective inputs; the input of said first amplifier being coupled through respective resistors to said first input of said circuit, to said first amplifier output, and to the output of one of said decoders, and the input of said second amplifier being coupled through respective resistors to said second input of said circuit, to said second amplifier output, and to the output of the other one of said decoders.

2. A converter circuit as claimed in claim 1, wherein the inputs of said first and second operational amplifiers are respectively coupled to the first and second outputs of said converter circuit.

3. A converter circuit as claimed in claim 1, wherein 8 l the outputs of said first and second operational amplifiers are respectively coupled to the second and first outputs of said converter circuit.

4. A converter circuit as claimed in claim 1, wherein said digital input of at least one of said decoders comprises (11-2) terminals, where n is an integer greater than 2, for applying thereto the (11-2) bits of the coded signal representative of an angle a, and an additional input for receiving an additional bit, so that for one value of said additional bit, said decoder is imparted a gain equal to km, and that for the other value of said additional bit, said decoder is imparted a gain where 0t and d are expressed in the same units in which a is equivalent to four right angles.

References Cited UNITED STATES PATENTS 2,853,699 9/1958 ONeil 340347 3,277,464 10/1966 Naydan et al. 340347 3,345,505 10/1967 Schmid 235-497 THOMAS A. ROBINSON, Primary Examiner M. K. WOLENSKY, Assistant Examiner 

